Sorting apparatus



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ATTORNEY May 3, 1960 H. P. GUERBER somme APPARATUS 7 Sheets-Sheet 7IN1/Enron wmfuezber United States Patent O 2,935,132 soR'rlNG APPARATUS5 Howard P. Guerber, Haddonield, NJ., assignor to Radio Corporation ofAmerica, a corporation of Delaware INTRODUCTION l5 General Thisinvention relates to methods of and apparatus for sorting seriallystored data into a predetermined sequence.

Complex electronic machines are being employed in connection withpresent day information processing systems particularly `because oftheir high speed and eieiency.

Most cfcient processing of the information is attained when theinformation required for the next operation of the machine isimmediately available. Accordingly, large scale electronic machines areprovided with an internal memory in which the information required forsubsequent operations of the machine may be stored. The information canthen be rapidly obtained from the internal memory when it is requiredduring an operation. However, the internal memory of most `high speedelectronic machines is limited, the average capacity being in the orderof approximately 1000 words. Therefore, the internal memory issupplemented by an external memory in the situation where largequantities of information are `to be processed. Magnetic and perforatedtapes are commonly used `as the external memory for the machine becauseof the great amount of information which can be stored on a small bulkof tape.

In many cases the information stored on the tapes is in random order. Itis often desired to sort this information into some predeterminedsequence. For example, in many of the automatic billing and inventorySystems a continuous record of tne transactions occurring during adesignated `billing period is maintained as they occur, The transactionsherein termed messages may consist of remittances from customers,changes in customer address, additional purchases made by the customer,etc. Each message is identified `by a code symbol which may bealphabetic or numeric or both. The sorting of the messages into anorderly arrangement can be an expensive and time consuming operation.

A prior art method of sorting the stored messages comprised the steps ofsuccessively subdividing the messages into a plurality of groups. Thegroups are then subdivided into a number of smaller groups until finallyeach group consists of a single message. This method requires a largenumber of input-output media for the sorting operation.

Other methods achieve the sorting by selectively transferring themessages recorded on the magnetic or perforated tape herein termed theprimary tape onto one or more output tapes. Among such methods ofselective transfer are the Strings of Two and Progressive Sortingmethods.

"Strings of Two method In the Strings of Two method, the messagesappearing on the primary tape are successively regrouped into a 70plurality of groups. All the messages within a group are maintained innumerical or alphabetical sequence.

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These groups are then merged into still larger groupings until finallyall of the messages appear in one sequential group. A completeregrouping of all the messages appearing on the input tapes (by passageof the input tapes) is herein termed a pass On the rst pass, themessages are sorted into groups of two; on the second pass, the messagesare sorted into groups of four; on the third pass, into groups of eight,ctc. The number of passes required before sorting is completely assuredvaries with the number of messages appearing on the primary tape and maybe determined from the expression 2m1 n 21n where m represents thenumber of passes and n represents the number of messages.

The Strings of Two method of sorting requires the use of two input tapeswhich together are passed through the device and two output tapes onwhich the messages appear in a rearranged grouping. Before sorting isstarted the messages recorded on the primary tape are transferred to twoinput tapes, each input tape receiving one half of the messages.

On the first pass of the input tapes through the device, the messagesare regrouped in groups of two on the output tapes. Each group of twomessages is composed of one message from each of the input tapes. Oddgroups are recorded on the first of the output tapes, and even groupsare recorded on the second of the output tapes. After the completion ofa pass, the output tapes are used as the input tapes. On the secondpass, the groups of two messages are regrouped into groups of four ontwo output tapes. Each group of four messages is composed of twomessages from each of the input tapes. Again, odd groups are recorded onthe first of the output tapes, and even groups are recorded on thesecond of the output tapes. During the third pass, the messages areregrouped into groups of eight on the output tapes, and so on. Themessages of a group are maintained in sequential order within the groupin which they are located. The number of messages .r to be transferredfrom each of the input tapes during any pass may be expressed as .r=2y'1where y represents the number of the pass.

The Strings of Two method of sorting can best be explained by thefollowing example.

Example of sorting by Strings of Two method The numbers listed in TableI below represent the serial numbers of the respective messages. Numbersare employed because the example is then easier to follow. It isapparent, however, that the Strings of Two" method of sorting isapplicable to logical sequences other than numerical.

TABLE I TABLE II Tape A Tape B In accordance with the expression X:2U-1, on the first pass (y=1) one serial number (X) is read from eachof the input tapes A and B. The respective serial numbers are thencompared. The two messages identified by the serial numbers are thentransferred to one of the output tapes, for instance, tape C of Table HIbelow, the message with the smaller serial number of the two beingtransferred first. Thus, serial number 2 is compared with serial number7 and the messages transferred to tape C appearing in sequence as 2, 7.The serial numbers of the second of the messages are read from tapes Aand B and compared with each other. These two messages are thentransferred to a second output tape, for instance, tape D of Table IIIbelow, the message having the smaller serial number being transferredfirst. Thus, serial number 23 is compared with serial number 24, and thernessages are then transferred to tape D appearing in sequence as 23,24. The reading, comparing, and transferring of two messages at eachstep is continued during the first pass until all the messages have beenrecorded in groups of two alternately appearing on tapes C and l) asshown in Table III.

`During the second pass, the two output tapes C and D become the inputtapes. The original input tapes A and B if suitably erased may be usedas the output tapes. The erasing heads may be placed either on the inputtapes or on the output tapes.

fOn the second pass, two messages are transferred from each of the inputtapes onto a single one of the output tapes as follows. Serial number 2of tape C is compared with serial number 23 of tape D. As serial number2 is the smaller, the message thus identified on tape C is transferredto one of the output tapes, for instance, tape A, of Table IV below.However, unlike the first pass. the message designated by serial number23 of tape D is not then transferred. Instead, tape C is advanced oneposition and serial number 7 is compared with serial number 23. As 7 isthe smaller of the two, the message thus identied on tape C will also betransferred to tape A1. Operation of tape C is then stopped because theoutput group ou the second pass is to be composed of two messages fromeach of the input tapes. The messages identified by serial numbers 23and 24 of tape D are then transferred one after the other to the outputtape A1. Thus, the four messages recorded on tape A1 are recorded innumerical order. Next, serial number ll of tape C is compared withserial number 6 of tape D. As serial number 6 is the smaller', themessage thus identified on tape D is transferred to the second of theoutput tapes, for instance B1 of Table lV below. Tape D is then advancedone position and serial number l7 of tape D compared with serial number1l of tape C. As serial number 11 is the smaller, the message thusidentified on tape C is transferred to tape B1. Tape C is then advancedone position and serial number 17 is compared with serial number `l8. Asserial number i7 is the smaller, the message thus identified on tape Dis transferred to tape B1. Operation of tape D is then stopped as twomessages appearing thereon have been transferred to the output tape B1.At the same time, tape C is advanced one position and the messageidentified by serial number i8 is transferred to output tape B1. Theprocedure of sorting the groups of two messages appearing on each of theinput tapes into a single sequential group of four alternately on one orthe other of the output tapes is continued until the second pass iscompleted. The resorted messages appear on output tapes A1 and B1 asindicated by Table IV below.

During the third pass, tapes A1 and B, become the input tapes. Again,tapes C and D, if suitably erased.` may be used as the output tapes. Onthe third pass, the messages are regrouped alternately on the outputtapes in groups of eight. Each group of eight messages is composed offour messages from each of the input tapes. The procedure of comparingthe serial numbers and transferring the message identified by thesmaller is carried out as explained in the description of the secondpass except that four messages are transferred from each input tape to asingle output tape. The messages appear on the output tapes designatedas tape C, and tape D1 of Table V below TABLE V Tape C; Tape Dt Duringthe fourth pass, the messages are regrouped on the output tapes ingroups of 16. The above described procedure of comparing andtransferring is followed on the fourth pass except that eight messagesare transferred from each input tape to a single output tape. Thus, thesixteen messages selected for the example appear in numerical sequenceon one of the output tapes.

If desired, the messages may be grouped in descending order by selectingthe message identified by the larger serial number for transfer to theoutput tape.

The situation may arise that two of the messages have the same serialnumbers. In this situation, the apparatus arbitrarily advances one ofthe input tapes each time the comparison indicates that such an equalityexists.

A group end code may be provided to insure against a possibility ofmissorting which may occur due to the malfunctioning of the input tapeadvance mechanism. The group end code serves to identify each pass andinsures that the proper number of messages are transferred from eachinput tape during the particular pass. Thus, on the lirst pass, thegroup end code would cause the input tapes to advance in a staggeredfashion one message position at a time. During the second pass, thegroup end code would not allow the input tapes to advance more than twomessage positions at a time and so on.

Progressive Sorting method Progressive Sorting takes advantage of thehigh probability that small groups of the messages will have beeninitially recorded in sequential order oa the primnrv tape. Thus, somesaving in time can be made by exploiting the initial order of the groupsof messages during the sorting process. Also, progressive sorting maycommence either with the two input tapes or with the primary tape.

In order to carry out this method, three different comparisons are madeinstead of the single comparison made in the Strings of Two method.

For example, assume that the two input tapes A and B are used, and it isdesired to sort the messages in ascending order. During the lirst pass,the serial number of the first message on tape A is compared with theserial number of the first message on tape B. The smaller of the twocauses its tape (assume tape A) to be ad vanced one position and thefirst message is transferred to one of the output tapes. At the sametime, the smaller serial number is transferred to a third memory orregister of any suitable type. The second message of tape A is now inposition to be compared with the first message of tape B because onlytape A advanced after the first cornparison. This second comparison iscarried out, and in addition, the two serial numbers are also comparedwith the serial number which is stored in the third register. Thecomparisons are carried out and the messages are recorded on one or theother of the output tapes in accordance with the following logicalexpressions where:

c is the serial number of the message stored in the memory;

a is the larger of the serial numbers of the input messages;

b is the smaller of the serial numbers of the input messages;

If a c and b c transfer b onto the same output tape as c If a c and b ctransfer a onto the same output tape as c.

If a c and b c transfer b onto the other output tape.

Thus, so long as the sequence of the serial numbers is maintained,recording is continued on the same output tape.

The Progressive Sorting method is self correcting. Thus, if one of theserial numbers should happen to appear out of order on an output tapedue to a malfunction, it starts a new sequence during the nextassembling operation. The error is not repeated, as in the case in theStrings of Two method. A detailed example of Progressive Sorting isprovided in the diagram of Fig. 6 which is self-explanatory.

CODING Presently known machines and computers of the digital typeusually change information which is being supplied to the machine orcomputer from the form in which it is customarily handled, namely,alphabetic and/or numerio to a code which may be more convenientlyhandled by the machine. The code presently preferred is a binary typebecause the binary digits zero and one are easily represented by thecondition of an element which has two distinct stable states. Commonlyused binary elements are relays and flip-flop circuits. Accordingly inthe present invention, the messages may be encoded on the tape in thebinary system of notation.

Either paper or magnetic tape may be used. If paper tape is used, abinary one may be represented by a perforation in the paper and a binaryzero may be represented by the absence of a perforation. lf magnetictape is used, the so-called non-return-to-zero method of recording maybe employed. This method represents a binary one by the presence of amagnetized spot on the tape and a binary zero by the absence of amagnetized spot.

Magnetic tape is preferred in the present instance because the inputtapes may then readily be erased and re-used as the output tapes on thenext succeeding pass.

In the electrical typewriter and computer arts, it is common practice toarrange the magnetized spots selectively in a plurality of parallelchannels such that a particular combination of spots side-by-side mayrepresent a number, a letter, or a special information symbol; any ofwhich is herein termed a character. Six binary digits are normallysufficient to represent all letters of the English alphabet and decimalnumbers as Well as the special information symbols required since sixdigits provide 63 binary numbers exclusive of zero. For convenience inmanipulating the information, the binary numbers which correspond toletters of the alphabet are normally kept in sequence. A seventh binarydigit may be added to the combination for odd-even cheek purposes.

A group of characters arranged in series upon the tape may represent aword, a multi-digit number or special informative symbols herein termedan item.

Thus, a message may be represented by a group of one or more items whichin turn may consist of a group of one or more characters. A startmessage and end message symbol may be recorded at the beginning and theend of each message.

Other methods of recording the characters, for example, serially in acommon channel are also well known in the art and may be used within thescope of the present invention.

OBJECTS Therefore, it is an object of the present invention to provide anovel apparatus for sorting serially stored messages into apredetermined sequence.

Another object of the present invention is to provide an improvedelectronic apparatus for sorting messages which are stored on magneticor perforated tape into some predetermined sequence.

Still another object of this invention is the provision of an etcientsorting apparatus wherein only a portion of a message need be read intoa storage register.

A still further object of the present invention is to provide a rapidsorting apparatus which causes a selected one of the messages encoded oneach of two input tapes to be transferred to one of two output tapes.

Yet another object of the present invention is to provide a novelapparatus which maintains the messages in sequential groups on theoutput tapes.

Still another object of the present invention is to provide a novelmeans for sorting serially stored messages appearing on each of twoinput tapes into sequential groups in alphabetical or numerical sequenceon each of two output tapes and repeatedly merging each of the outputgroups into still larger sequential groups during subsequent passes,until all of the messages finally appear in a single sequential group onone of the output tapes.

An additional object of the present invention is to provide an improvedelectronic sorting apparatus which operates asynchronously to sortmessages recorded on two input tapes into a predetermined sequence onone or more output tapes.

BRIEF DESCRIPTION These and further objects of the present invention areachieved by providing multiple pairs of reading heads, one of thesepairs respectively disposed along the path of each input tape. A firstreading head of each pair precedes the other head of that pair in thepath of each input tape. A pair of storage registers are provided eachconnected, respectively, to the lrst of the reading heads. Each storageregister may have a capacity sutilcient to store any desired portion ofthe message. In the present embodiment, the sorting criterion is set outin the first eight characters of each message. The sorting criterion maybe alphabetic or numeric and is referred to hereinafter as the serialnumber of the message. Therefore, the capacity of the register need beonly as great as the Serial number of a message. Because each characteris composed of six bits, each storage register is arranged to storeforty-eight bits.

The storage registers are connected to a comparator wherein the serialnumbers of the messages are compared one with the other. Because thecharacters are to be arranged on the tape in order ot decreasing rank.the characters within the serial number are compared serially, and thebits within the characters are compared in parallel. Thus, the iirstcharacters of the serial nurnbers are brought out from the registers tothe comparator. The highest ranking bits of these iirst characters arecompared; if they are equal. the next two bits are compared; and so on.If an equality exists between any two bits, the comparator sends anappropriate signal to condition one of two gates, upon the receipt ofthe eighth character of the serial number being read, the gate thusconditioned sends a signal to reset the appropriate register and to theappropriate tape advance mechanism to cause the corresponding input tapeto advance. When the tape is thus advanced, the message is brought underthe second of the reading heads individual to the advancing tape and isread out to one of the output tapes.

If no equality exists in the respective bits of the first twocharacters. the next successive two characters are compared in likefashion and so on. In case all the characters of the serial numbers areequal, an arbitrary one of the input tapes is advanced one position.

The Strings of Two sorting method requires that the messages be retainedin groups on the output tapes. Proper grouping of the messages isinsured by two predetermined message counters. The predeterminedcounters are advanced one power of. two for each pass. Thus, on thefirst pass, the counters allow only one message to be read from each ofthe input tapes, on the second pass two messages, etc.

The output from each of the predetermined counters is connected to anand gate. Upon the completion of each group, the and gate actuates aswitch thereby causing the next group to be recorded on the other of theoutput tapes. The output of the and" gate also serves to reset thepredetermined counters.

In the accompanying drawing, like reference characters e refer to likeparts:

Fig. la and Fig. 1b when assembled with Fig. lb immediately to the rightof Fig. la constitute Fig. l. Fig. 1 is a schematic diagram, in blockform, of the general arrangement of an apparatus according to theinvention;

Fig. 2 is a schematic diagram of the arrangement of an input matrix 38ain block form. The components associated with input matrix 38a are alsoindicated in the drawing;

Fig. 3 is a schematic diagram of the arrangement of a storage register46a in block form;

Fig. 4 is a schematic diagram of the arrangement of an array of outputgates 48a;

Fig. 5 is a symbolic illustration of the arrangement of the messages onan input tape;

Fig. 6 shows an example of the progressive sorting" method;

Fig. 7 is a schematic diagram of one comparator useful in the apparatusof Fig. l.

DETAILED DESCRIPTION Description of the input tape arrangement (Fig. S)Referring now to Fig. 5. the seven bit binary code,

is recorded transversely across the tape 10 in parallel channels 14a-g.Each character of the message is defined by a combination of bits inchannels 14h-g. Channel 14a is provided for recording an odd-even checkbit which is used for error checking purposes. The first character ofeach message is a start message symbol which is widely used in thetelegraph art to condition the apparatus for further operation.

A sorting zone may be defined as the length of tape allotted to thenumber of characters which are set aside for purposes of identifying aparticular message. in the present embodiment, the sorting zone 12 ofFig. 5 is comprised of a start message symbol and the iirst eightcharacters following thereafter. More or less than eight characters canbe set aside for the serial number of the message depending on thenumber of messages which are to be sorted. The message identifyingcharacters may be alphabetic or numeric or some other arbitrary orderedsymbols. However, in the present instance, the binary numbers assignedto the alphabetic characters are larger in binary notation than thebinary numbers as signed to the numerical digits 0 to 9. Therefore, amessage which has an alphabetic serial number always has a correspondingbinary value which is larger than that 0f a message which has anumerical serial number. Hence, if the messages to be sorted arecomposed of messages with numerical serial numbers and alphabeticalserial numbers, when the sorting operation is completed, the messageswhich have the numerical serial numbers appear in numerical sequence onthe output tape followed by the messages which have alphabetic serialnumbers, also appearing in alphabetical sequence.

An eight character sorting zone allows for the recordation of all serialnumbers equal to or less than eight digits or letters. The encodingprocedure varies somewhat depending on whether thc serial number isalphabetic or numeric. When the serial number is alphabetic, it isencoded on the tape beginning with the rst letter in the name or word.If the name or word is composed of less than eight letters, the unusedcharacters remaining in the sorting zone are filled in with blanksymbols or nulls which may be represented by a character having one ormore bits. When the serial number is numerical, it is increased to aueight digit ruunber by adding su. appropriate number of null symbols tothe left of the most significant digit. The number is then encoded onthe tape beginning with the first digit on the left. Thus, the rstcharacter recorded in the sorting zone is the order determiningcharacter of the serial number followed by the remaining characters inorder of precedence.

Immediately following the sorting zone are the items which comprise themessage proper. The message proper may have any number of characters.The last character of the message proper may be followed by a stopmessage symbol. The stop message symbol may be omitted in the presentembodiment because the tape advance is automatically stopped after theeighth character of the serial designation has been read out by thefirst reading head 16.

Reading head 18 is located a suitable distance beyond reading head 16 inthe direction of tape motion. The spacing between the two reading headsis a function of the stop-start characteristic of the tape drivingmechanism and the length of the sorting zone. This spacing is employedbecause during the operation, the apparatus reads the eight charactersrepresenting the serial number of a message encoded on input tape beforethe tape advance is stopped. iowever, the tape driving mechanism cannotbe stopped instantly. and therefore continues to move the tape a smalldistance after the stop signal is received. lf the second reading headwere located too close to the first reading head, a portion of themessage might come under the second reading head during the stoppinginterval. The second reading head (18) is always conditioned to read outto the output tape any characters which come beneath it. Thus a portionof the message would be read out to the output tape even though thecomparison of the serial numbers indicated that this particular messageshould not have been read out until a later time. Also, the drivemechanism cannot immediately bring the tape movement up to the properrecordiny speed because of the inertia of the tape drive mechanism. Thenecessary start interval is likewise compensated for in the spacing ofthe second reading head 18. Therefore, the second reading head 18 islocated beyond the first reading head 16 in the direction of tape motionand at a distance 24 which is equal to the distance set aside for thesorting zone 12, plus the distance required to bring the tape to acomplete stop 20, plus a distance 22 necessary to bring the tape up to aproper recording speed. A portion of tape 1S between the end of onemessage and the start of the next message is left blank to allow for thespacing between the alpha and beta reading heads. A suitable precisionstop-start mechanism is described in copending application Serial No.248,767 filed by Joseph M. Uritis on September 28, 1951, entitled ValveActuating Mechanism, now Patent No. 2,750,961, issued .Tune 19, 1956.This mechanism is capable of bringing a tape moving at a velocity of 100linear inches per second to a complete stop in 5 milliseconds or less.The mechanism described can also bring a tape from cornplete stop tofull speed in the same time interval. The mechanism described in thesaid copending application starts or stops the tape in response to asuitable start or stop pulse respectively. The manner of connection toreceive the start or stop pulse of Fig. 1 for the tape drive mechanismwill be obvious to those skilled in the art.

Description of the sorting apparatus (Figs. la and lb) The system shownin Fig. l of the drawings is a generalized block digaram of a preferredapparatus for sorting messages according to the Strings of Two method.In order to shorten the length of the description of the arrangement ofFig. l, only the components connected to the A tape are described indetail. Throughout the description of the arrangement, the componentsassociated with tape A are designated by a numeral followed by thesubscript a. These components which are associated with tape B which aresimilar and perform similar functions are designated by the same numeralused to denote the corresponding component associated with tape A, butfollowed by the subscript b. The components which are common to bothtape A and tape B are designated by a numeral without any subscript.Although not apparent from immediate inspection, the arrangement of Fig.l is symmetrical, that is, there are like A and B components, andcertain components in common, the latter having no subscripts.

The first character of the serial designation is the start messagesymbol. The rst reading head 16a is a 6 channel reading head and detectsthe magnetized spots in channels 14b-g of Fig. 5. The magnetized spotwhich may be present in channel 14a is for oddeven parity checkpurposes, but a parity check spot is not necessary to the sortingoperation, and therefore is not difficult further hereinafter. Forconvenience of illustration, the connections between the variouscomponents are shown as a single line although a plurality of leads mayinterconnect the various components. The situation where a linerepresents more than one lead is indicated by the interposed subscriptsin the line.

Referring to Fig. la, the six channels of the first multiple readinghead 16a are connected to the inputs of six pulse amplifiers 28a.

Although pulse amplifiers 28a are represented in the schematic drawingof Fig. l as a single block, it is to be understood that the blockcontains six identical pulse amplifiers, one amplifier being furnishedfor each of the information channels 14h-g which are encoded on themagnetic tape a. Thus, the six channels of the first reading head 16aare connected respectively to the inputs of the six pulse amplifiers28a. The outputs of the six pulse amplifiers 28a are appliedrespectively to the inputs of six pulse shapers 40a. Pulse amplifiersand pulse Shapers are well known to those versed in the art and need notbe described in detail here. The rounded pulse outputs from the readingheads are converted by the pulse amplifiers 28a and Shapers, 40a to arectangular waveform. Further information regarding conventional pulsecircuits may be obtained by referring to a standard textboel; sach asIWaveforms by Chance et al. infra.

The outputs of the pulse Shapers 40a are connected to the inputs of orgate 42a and to the inputs of code recognition gate 26. The coderecognition gate 26 may be of the general type described in Patent No.2,648,829 entitled Code Recognition System issued to William R. Ayres,August ll, 1953. The code recognition gate 26 may be set to respond toany given combination of pulses appearing on the input leads. In thepresent embodiment, the code recognition gate 26 is set to respond tothe start message symbol, which, for example, may consist of a pulse ineach of the six input leads. The output of the code recognition gate 26is connected via conductor 31 to delay unit 30.

The delay unit 30 and the other delay units referred to herein may be ofthe `type described in Chapter 22 of Waveforms by Chance et al.,published by McGraw- Hill Book Co. or alternatively a delay typemultivibrator may be employed. The output of the delay unit 3Q isapplied to the set input of Hip-flop 32.

Flip-flop 32 and the other bistable flip-flops employed herein may bethe well known Eccles-Jordan type or any other suitable bistable statecircuits known as triggers or bistable multivibrators.

Provision is made for shifting a dip-Hop from one stable state to theother by providing a set and a reset input. The output lead may beconnected to the tube associated with the set input. By applying asuitable signal to the set input, the flip-flop is shifted to its otherstable state and an appropriate output signal is generated. A Subsequentsignal applied to the set input is ineffective to produce an appropriateoutput signal unless the flip-flop has been shifted back to its firststable state by a suitable signal applied to its reset input. In thedrawing, the set input is labeled with an S and the reset input islabeled with an R. A suitable flip-Hop arrangement is described in anarticle by C. H. Page entitled "Digital Computer Switching Circuits,published in Electronics Magazine, September 1948 at page lll.

The output of the flip-flop 32 is connected to one of the inputs of andgate 34. An and gate is one of the logical coincidence circuits whichare well known in the electronic computer art. ln the presentembodiment, the logical circuits employed are "and gates, or gates, andan and-not gate. An and gate is an electronic circuit which provides anoutput signal only upon the coincidence of a predetermined number ofinput signals. An or" gate is an electronic circuit which provides anoutput signal upon stimulation by one or more input signals. Suitableand gates and or gates are described in an aforementioned article by C.H. Page, supra.

The output of and gate 34 is applied to the input of character counter36. The character counter 36 may be, for example, the "ring counter"which is described in chapter 3 of High Speed Computing Devices, supra.The ring counter is advanced one count for each pulse received at theinput. Counter 36 has eight stages, one stage per character of theserial number. Each output of the eight stages is connected to inputmatrix 38a.

Activation of or gate 42a by one or more input pulses from the pulseShapers 42a results in a single output pulse. This output pulse isconducted to one of the inputs of and gate 34. If and gate 34 has beenpreviously conditioned by the output of ip-op 32, it supplies an outputpulse to character counter 36. The output pulses of pulse shapers 40aare also supplied in parallel tc the second input grids of input matrix38a. A more detailed description of input matrix 38u is furnishedhereinafter in connection with Fig. 2. Briefly, thc input matrix consists of an array of 48 and" gates arranged in six rows and eightcolumns. Each one of the six pulse Shapers 40a is connected to thesecond input grids of a diderent row of eight and gates. Each stage ofthe character counter 36 is connected to the first input grids of acolumn of six and gates. Therefore, only one column of and gates areconditioned at any one time to fus-ni Ei w. output signal. The output ofthe character counters 31e is also connected to delay lines 49a ashereinafter dcscribed.

The outputs of the and gates of the input matrix 38a are connected tothe 48 inputs of storage register 46u. The storage register 46a iscomposed of an array of 4S ilip-llops- The 48 flipdlops are arranged insix rows and eight columns corresponding to the arrangement of the andgates of the input matrix 33a. The storage register may be of the wellknown stnticizer type which is described in an article by A. D. Boothentitled "The Physical Realization of an Electronic Digiital Computer,published in Electronic Engineering, December 1950, at pp. 492-498. Eachoutput of the and gates of input matrix 38a is connected to the setinput or the flip-op of storage register 4dr: to which it corresponds byrow and column. The outputs of the ilip-ops of the storage register 46aare similarly connected to the lirst input grids of a siX row, eightcolumn array of output and" gates 48a. The second input grids of eachcolumn of the output and gates 43a are connected to the outputs of eightconventional pulse delay lines 49u. The input to each of the delay lines49a is respectively connected to a different one of thc eight out putstages of the character counter 36.

The outputs of each column of the array of output and" gates 48a areconnected to six inputs of a comvparutor l). The comparator S0 may bethe electronic comparator shown in 4 of the copcnding application Ser.No. 375.?569 entitled Electronic Comparator, tiled hy P. Cheilili onAugust 24, 1953. The comparator compares the outputs of and" gates 8uand 4Gb and furnishes a signal signifying which of the characters fromthese two output and gates is the larger. Thus, if the characterreceived from the and gates 48h is numeri` cally larger in binarynotation than the character received from the and gates 48a, an outputsignal (B A) is furnished at lead 52a.

Lead 52a is connected both to an input of or gate 4S and to one of theinputs of a two input and gate 53a. Conversely, the output signal (A Bis furnished at lead 52h of comparator 50. Lead 5211 is connected bothto a second input of or gate 45 and to one of the inputs or" a two inputand gate 53b. The output or" or gate 45 is connected to the reset inputof llip-liop 55. The output of flip-Hop 55 is connected to the secondinputs of both two-input and gates 53a and 53h. The output signal of andgate 53a is applied to one of the inputs of a two input or gate 54a.

The output of the or gate 54a is connected to the set input of flip-flop35a and to an input of or" gate 57h. The output of or" gate 57h is inturn connected to the reset input R of a ip-ilop 35h. Conversely, theoutput signal of and" gate 53h operates to set flip-flop 3511 and toreset dip-hop 35a. The output of flip-liep 35a is connected to one ofthe inputs of and gate 59a. The output of and gate 59a is connected tothe start input of an A tape drive mechanism 56a and to the stop inputof a B tape drive mechanism 56h. The tape drive mechanisms may be theaforementioned mechanism described in connection with Fig. 5. The outputof and gate 59a is also connected through delay line 61a to the input ofpredetermined counter 58a. The predetermined counters `58a and 53h maybe of the type described by John I. Wild in an article entitledPredetermined Counters published in Electronics, vol. 20, No. 3, pp.121-123, March 1947. Such a counter operaates to furnish an output pulseonly after preset number of pulses have been received at its input. Theoutput of predetermined counter 58o is connected to an input of "andgates 63a (Fig. la) and 6l) (Fig. lb). The output of and gate is appliedto the input of a Schmitt trigger 69. The output of the Schmitt trigger69 is ap plied to the reset input of predetermined counters 58a and 58!)(Fig. la), and also to the input lead of flip-flop :32. tfiig. liti.

Flip -f1op 62 is a conventional bistable device described in chaper 3 ofThompkins and Wakelin supra. Successive signals applied to the singleinput lead reverses the operating state of the circuit. The plate of oneof the tubes (assume that left-hand tube (L) as marked on the drawing)is connected to an input of and gate 74a. The plate of the other of thetubes (assume the right-hand tube (R) as marked on the drawing) isconnected to an input of and gate 74b.

The ouutput of and gate 74a is connected to the set input of a ilip-llop73, and the output of and" gate 74b is connected to the reset input oftlip-tiop 73. Flipflop 73 is provided with two output leads 71a and 71b.If we assume that conduction is shifted from the lefthand tube (L) (asmarked in the drawing) to the right hand tube (R) (as marked in thedrawing) when a set signal is received, then an appropriate outputsignal will appear on output lead 71a. Conversely, when conduction isshifted back due to a reset signal, then an appropriate output signalwill appear on output lead 71b.

Output lead 71a is connected to the rst input grids of a first group ofseven and" gates 64a; output lead '11b is connected to the rst inputgrids of a second group of and gates 64b.

The output of and gate 74a also is connected to the start input ofoutput tape C drive mechanism 70a and to the stop input of output tape Ddrive mechanism 70b. The output of and gate 7 4b is likewise connectedto the start input of output tape D drive mechanism 7019 and to the stopinput of output tape C drive mechanism. The outputs of the set of andgates 64a is connected to a seven channel recording head 65a of outputtape C. The outputs of the set of and gates 64b is connected to a sevenchannel recording head 65b of output tape D. The second input grids ofboth sets of and gates 64a and 64b are connected to the seven outputs ofa fourteen input or" gate 66. Seven of the inputs of or gate 66 areconnected to the second reading head 18a (Fig. la) of input tape A. Theother seven inputs are connected to the second reading head 18h of inputtape B. The output tapes C and D (Fig. lb) are driven respectively bydrive mechanism a and 7Gb in the directions indicated by the arrows.Erase heads 67a and 6'7b are provided in the path of each output tape.The erase heads are conventional units in the magnetic recording art,and are used to remove the present recording from the tape and tocondition the tape to receive a new recording.

The last stage of character counter 36 (Fig. la) is connected to theinput of a Schmitt trigger 37. The undelayed output of the Schmitttrigger 37 is connected to an input of and" gate 63a and to an input ofand gate 63h. In addition, the undelayed output of the Schmitt trigger37 is connected to the ser input of Hip-flop 55. The output of Schmitttrigger 37 is also connected to delay lines 39, 4l, and 43. The outputsignal of delay line 39 is applied to an input of and-not gate 51. Oneof the inputs of and-not gate 51 is also connected to the output ofllip-llop 35a; the third input of and-not gate 51 is likewise connectedto the output of llip-ilop 35h.

The output of and-not gate 51 is connected to an input of or gate 54a.The output of delay line 41 is applied via the initiate conductor to aninput of and gates 59a and 59h and also to an input of and gates 74a 1and 74b (Fig. lb). The output of delay line 43 is applied to the resetof inputs of ip-ops 35a, 35b, and 32. The output of delay line 43 isalso applied to the reset input of character counter 36. A common ground(not shown) is also connected to the individual circuits shown in thedrawing.

Arrangement of the input matrices (Fig. 2)

Fig. 2 is a block diagram of the arrangement of the input matrix 38a.The arangement of input matrix 38h is similar. These associatedcomponents are also shown which are essential for clarity. Where thecomponents are the same as those shown in Fig. l, they are given thesame designation. One of the blocks 78a is detailed in order to show theconnection of a conventional and gate circuit. A suitable and gate maybe a multiple-input vacuum tube such as a pentode 76a. A typical andgate is described by C. H. Page in an article entitled Digital ComputerSwitching Circuits, supra. Briey, both of the input grids 81a and 83aare normally biased below their cut of point. In order to obtain anoutput 84a, both of the input grids must be driven above the cut oifpoints at the same time.

Each of the blocks 78a contains a similar and gate. The and gates arearrayed in eight columns 80a and six rows 82a. The outputs of the sixchannels of the first reading head 16a is applied to the inputs of pulseamplier 28a and the output of these pulse amplifiers 28a is applied tothe inputs of pulse Shapers 40a. Each of the pulse Shapers 40a isconnected to all the second input grids 33a of the and gates 78a in adifferent one of the rows 82a. Each of the pulse Shapers is alsoconnected to one of the inputs of or gate 42a. The output of or gate 42ais also connected to one of the inputs of or gate 47 which output inturn is connected to one of the inputs of and gate 34. The output of andgate 34 is applied to the eight stages of character counter 36. Each ofthe stages of the character counter is connected to the first grid 81aof the and gates 78a. As aforementioned, the character counter may beone of the well known ring-type counters which is widely used in themultiplex telegraph art as an electronic distributor. Due to theinternal connections of the ring counter, only one stage at a time isoperating. The operating stage conditions the next succeeding stage foroperation. Thus, the operation of the character counter 36 is shiftedone stage each time an input signal is received. The operating stage ofthe ring counter thus conditions one column 80a of the input matrix 38aeach time an input signal from and gate 34 is received. The outputs 84aof the and gates 78a are applied to the corresponding inputs of thestorage register 46a of Figure la. The eighth stage output (on lead 86a)of character counter 36 is applied to the input of Schmitt trigger 37 ofFig. la. Each output of the eight stages of the character counter 36 isalso applied in similar fashion to the eight-columns of input matrix38h. Each of the six rows of input matrix 38b is also connected in likefashion respectively to the output of an individual one of the pulseShapers 4Gb.

Description of storage register of Fig. I

(Fig. 3)

Referring to Fig. 3 which shows in greater detail the arrangement of thestorage register 46a of Fig. l, the forty-eight flip-flops 88a arearranged in an array of eight columns 90a and six rows 92a. The outputs84a of each of the and" gates 78a of the input matrix 38a are appliedindividually to the set input of a corresponding ip-op 88a. Conductor94a is connected to the reset input of each one of the ip-flops 88a. Thereset signal applied to the Hip-flops 88a by conductor 94a is receivedfrom the output of and gate 59a. Thus a signal furnished at the outputof and gate 59a operates to reset all of the flip-flops 88a of thestorage register 46a to their inidit 14 tial condition. The output ofeach of the ip-llops 88a appears on conductors 96a. The arrangement ofthe storage register 4Gb is identical except that the reset signal isreceived from the output of and gate 59h.

Description of output "and gates of F ig. 1

(Fig. 4)

Fig. 4 is a more detailed schematic drawing of the arrangement of theoutput and" gates 48a. The output and" gates are arranged in an array ofeight columns ta and six rows 102a similar to the input matrix andstorage register arrays. Each of the blocks 98a represents a two inputand gate similar to and" gate 78a previously described in connectionwith Figure 3. The second grid of each and gate 98a (Fig. 4) isconnected to the output of the corresponding dip-flop 88a of the storageregister 46a shown in Fig. 1a and Fig. 3. The first grid of the andgates of each of the eight columns 10011 is connected respectively toeach of the eight delay lines 49a. The inputs to each delay line 49a isconnected respectively to each of the output stages of the charactercounter 36a of Fig. 2. The outputs of each row 102e of and gates 98a areconnected in parallel respectively to the conductors 106416. The outputconductors 106- r 116 are connected respectively to one of the sets ofinputs of the comparator 50 of Fig. 1.

Description of the comparator of Fig. 1 (Fig. 7)

The comparator 50 includes six separate stages, a different one of eachof the six binary digits in a character. Signals representing thehighest order digits (25) of the a and b characters are coupled from theoutput gates 48a and 48b (Fig. 2a) to the highest order stage 25 of thecomparator 50 (Fig. 7). Signals representing the 24 digits of the a andb characters are coupled to the stage 24 of the comparator 50, and soon.

Only the 25 stage of the comparator is shown in detail in Fig. 7.However, each of the remaining stages is similar except for one and gateas described hereinafter. The stage 25 of the comparator 50 includes apair of amplifiers 120a and 120i), responsive to the 25 signals of the aand b characters, and a pair of pulse transformers e and 140brespectively coupled to the amplifiers 120e and 120b. Each of the pulsetransformers 140.1 and 140b provides a relatively high-level output a5and b5 when the 25 signals represent a binary one," and relativelyhigh-level outputs :15, 55 when the 25 signals represent a binary zero.

Four two-input and gates 240 are used to indicate equality or inequalitybetween the 25 digits of the a and b characters. The first of the and"gates G-SS has one input coupled to the a5 output of the pulsetransformer 140a, and another input coupled to the b5 output of thetransformer 1402:. The and gate G-Ss provides an output signal when the25 signal of the a character is a one and the 25 signal of the bcharacter is a zero. The second and gate G-ST has one input coupled tothe b5 output of the transformer 140b, and another input coupled to the(t5 output of the transformer 140e. The and gate G-ST provides an outputsignal when the 25 signal of the b character is a one and the 25 signalof the a character is a zero. The third and gate G-SP of the and gates240 has one input coupled to the a5 output of the pulse transformer140a, and a second input coupled to the b5 output of the pulsetransformer l40b. The and" gate G-SP provides an output when the 25signals of both the a and b characters are binary ones The fourth andgate G-SR has one input coupled to the E5 output of the transformer140b, and a second input coupled to the output of the transformer 140a.The "and gate G--SRI provides an output when both the 2 signals of the aand b characters are binary zeros.

The outputs of the third and fourth and gates G-SP and G-SR are coupledto the inputs of a two-input or" circuit 340. The output of the orcircuit 340 is coupled to the input of an amplifier 120e which has itsoutput connected to a third input of the 24 stage of the comparator.Each of the other stages 24 through 2o of the comparator 50 is similarto the 25 stage except that each of the four and gates 240 is athree-input and gate having its third input connected to the output ofan amplifier 120C. Each of the outputs of the and" gates G-SS of the sixstages is connected to a different one of the six inputs of an orcircuit 360a. The output of the or gate 360o represents the A B signalon the output lcad 52.1 (Fig. 1b). The outputs of the and gates G-ST(Fig. 7) of the six comparator stages are each connected to a differentone of six inputs of an or circuit 360b. The output of the "or circuit360b supplies the A B signal on the lead 521: of Fig. lb. Thus, inoperation, the most significant digits 25 of both the a and b charactersare compared with each other. If an inequality occurs between thesedigits, one of the output leads 52a or 52h receives an output signal. Ifboth these bits are either ones" or zeros, the 24 bits of the a and bcharacters are compared. If the 24 bits are unequal, an appropriatesignal is supplied to one of the output leads 52a or 52h. However, ifboth the 25 and the 24 bits of the a and b characters are equal, the 23bits are compared, and so on, through the 2 bits. If the 2 bits areequal, the comparator supplies an A=B signal on the output terminal 440.The terminal 440 is not employed in the present sorting apparatus, sincethe absence of an A B and A B indicates that the a and b characters areequal.

Operation of the sorting apparatus (Fig. 1)

(A) PRELIMINARY OPERATION In operation, referring to Figs. la and 1b,before sort` ing is commenced, a clear signal is applied to theHip-flops of storage registers 46a and 46b; for example, by a manualswitch (not shown). Then each of the flip-flop registers 46a and b is inits reset or zero condition. A reset signal is also applied to the inputtape switching fiip-fiops 35a and 3511 and to the output tape switchingflip-flops 62 and 73.

During the first pass, each sequential group recorded on an output tapeis composed of two messages, one of which is transferred from input tapeA and the otherof which is transferred from input tape B. This sortingcondition is taken care of by manually presetting each of thepredetermined counters 58a and 58h to produce an output after one inputpulse.

In the Strings-of-Two method of sorting, only one input tape is runningat any given time. Therefore, it is necessary to set up one of thestorage registers 46a or 46b by running a first one of the input tapeswhile the other is stopped, then stopping the first input tape andstarting the other, etc. Otherwise, the comparator 50 would be comparingthe serial number of the message encoded on the tape which is firststarted with zero, because the storage register associated with thestopped ltape is initially in zero condition. This zero comparison 1sprevented by applying a single impulse to predetermined counter 58a or58h, for example, by a manual switch (not shown), thus artificiallyincorporating a count of one of the predetermined counters. An inputtape is then started and the apparatus allowed to go through apreliminary sorting operation.

The preliminary sorting operation is commenced by starting input tape A.The start message symbol of the first message passesV beneath readinghead 16a. The bits representing the startV message symbol are detectedby the reading head 16a and a corresponding output signal is furnishedin parallel to the inputs of amplifiers 28a. The output signals ofamplifiers 28a are applied to the inputs of pulse shapers 40a. Theoutput signals of pulse shapers 40a are rectangular shaped pulses ofapproximately 2O microseconds duration. The output signals of pulseshapers 40a are applied to the inputs of code recognition gate 26, thesecond input grids of each of the and gates of the input matrix 38a, andthe inputs of or gate 42a. Or gate 42a furnishes an output signal whichis passed through or gate 47 to an input grid of and gate 34. However,and" gate 34 is not primed as explained hereinafter, and therefore isnot responsive to the first signals received at its inputs.

The start message signal is recognized by code recogni tion gate 26, andan output signal is furnished to delay line 30. The delayed outputsignal of the code recog nition gate is applied to the set input offiip-fiop 32. The output signal of fiip-fiop 32 is a DC. level voltagewhich is applied to one of the input grids of and gate 34 priming andgate 34 to respond to signals applied at the second of its inputs.

The and gates of input matrix 38a are not responsive to the signalsreceived from pulse Shapers 40a because the second input signal suppliedby character counter 36 is not present.

The second character detected by the first reading head 16a is thehighest order-determinative character of the serial number. This secondcharacter now represented by pulses in the appropriate channels of thereading head 16a is applied to the pulse amplifiers 28a and to the pulseShapers 40a. The output pulses suitably amplified and shaped are appliedto the second input grids of the input matrix 38a. These output pulsesof pulse Shapers 4tlg have a duration of approximately 20 microseconds.At the same time, the output pulses of pulse Shapers 40a are applied tothe inputs of the or gate 42a which, in turn, furnishes an output pulsewhich is applied to one of the inputs of or gate 47. The output signalof or gate 47 is applied to the second input of and" gate 34 now primedby the start message signal. The output signal of and gate 34 is appliedto the input of character counter 36, thereby rendering the first stageof character counter 36 operative. The output of the first stage of thecharacter counter 36 is applied to the first input grids of the firstcolumn of and gates of the input matrix 38a. Therefore, because thedelay caused by the "or gates 42a and 47 and the and gate 34 is only ofthe order of 2 microseconds, the input pulses received from the pulseshaper 4ila and the pulses received from the first stage of thecharacter counter 36 substantially coincide in the first column of theinput matrix 38a. Thus, the and gates of the first column of the inputmatrix 38a are made conductive. The outputs of the first column of theinput matrix 33a are connected to the set inputs of the first column offiip-fiops of storage register 46a. Thus, the iiip-iiops of the firstcolumn of the storage register 46a are set up to correspond to the firstcharacter of the serial number. The outputs of the rst column of thestorage register 46u are connected to the second input grids of thefirst column of the output and gates 48a. Since the tiip-fiops willremain in one or the other stable condition, the storage register 46acontinues to condition the first column of the output and gates 48auntil the fiip-iiops are reset to their zero condition. The output of.the first stage of character counter 36 is also applied to delay lines49a. The purpose of delay lines 49a is to allow for the small intervalof time (approximately 2 microseconds) which is required to set up thefiip-fiops of the storage register 46a. The outputs of delay lines 49aare applied to the first input grids of the first column of the outputand gates 48a. The signal from the fiip-fiops of the storage register46a and the pulses from the delay lines 49a substantially coincide inthe first column of the output and gates 48a. Therefore, an outputsignal representative of the first character of the serial number isapplied to one of the inputs (6 leads) of the comparator 50.

The succeeding characters of the serial number of the first messageencoded on tape A are detected by the first reading head 16a andswitched through the input matrix 38a to the storage register 46a. Onecharacter of the serial number is stored in nach column of the storageregister 46a. The outputs ot` each of the columns of the storageregister 46a remain impressed on the second grids of the output andgates 48a thereby priming the and" gates for subsequent operation.

As was explained previously, the output and" gates 48a are gated columnby column by the output pulses of the delay lines 49a. Thus the serialnumber is switched into the comparator 50, character by character.

Before the start of the sorting o-peration, the B tape storage registeris set to zero condition. Therefore, the result of the first comparisonin the comparator 50 indicates that the serial number of the A messageis greater than the serial number of the B message. The comparatorindicates this inequality by an appropriate signal at its A B output521i. This signal is passed over conductor 52h to or gate 45 and to oneof the first inputs of the two-input and gate 53b. The output of or gate45 is applied to the reset input of llip-op 5S. Because flip-flop 55 isinitially in a set condition, both and gates 53a and 53b are primed foroperation. Therefore, the signal applied at the second of the inputs ofand gate 53b is passed to an input of or gate 54b. The priming signalapplied to both and gates 53a and 53b is removed due to the reset signalapplied to flip-flop 55, thus subsequent inequality signals are notpassed through and gates 53a and 53b until ipop 55 is again placed inits set condition.

The output signal of or gate 54b is applied to the set input of rlip-op35b, and through or gate 57a to the reset input R of Hip-op 35a.

The eighth character of the serial number causes the character counter36 to furnish D.C. output voltage to Schmitt trigger 37. Schmitt trigger37 transforms the D.C. voltage of the last stage of the charactercounter 36 to a voltage pulse. This pulse is applied to one of theinputs of and gates 63a and 63h.

Because and gate 63a has already been primed by presetting predeterminedcounter 58a, and gate 63a furnishes an output pulse to the set input offlip-Hop 35b `and through or gate 57a to the reset input of ip-iiop 35a.However, the previous comparator 50 signal has already conditioned theflip-flops 35a and 35b, as described above, so the output pulse of andgate 63a which is passed through or gate 54h is not necessary during thepreliminary sorting operation. This is so because the function of andgates 63a and 63h is concerned with grouping the messages on an outputtape as described hereinafter.

The output pulse of Schmitt trigger 37 is also applied to delay line 39,and after being delayed a suitable interval, the output pulse of delayline 39 is applied to one of the inputs of and-not gate 51. The and-notcircuit is well-known in the art. For example, one arrangement of anand-not gate is described at page 272 of High-Speed Computing Devices,supra. The andnot gate will pass the signal applied from the output ofdelay line 39 unless la prior signal has been received from one or theother of the ilip-iiops 35a or 35b. The and-not circuit is provided tocause the A message tape to arbitrarily advance in case both the serialnumbers of the messages read from the A tape and the B tape are equal.An equality condition is indicated when both flip-flops 35a and 35hremain in the reset condition. In the present comparison, the comparator50 has indicated that the A message is greater than the B message.Therefore, dip-flop 35b is in the set condition, and the and-not gate isdisabled by the signal applied at the input connected to the output offlip-flop 35b.

The output pulse of delay line 39 is also applied to the input of delayline 41, and after being suitably delayed by delay line 41, the pulse isapplied w'a the initiate conductor to an gates 59a, 59h (Fig. la) and74a and 74b (Fig. 1b). Flip-nop 35a is in its reset position, and thusthe initiation pulse has no eiect on and gate 59a which is connected tothe output of ipilop 35u. However, flip-Hop 35h is in its set position,therefore, "and" gate 59h responds to the initiation pulse. The outputsignal of "and" gate 59h is applied to the start input of tape B drivemechanism 561) and to the stop input of tape A drive mechanism 56a.Thus, the eighth character of the serial number of the rst messagerecorded on tape A causes tape A to be stopped and tape B to be started.

At the same time, the output pulse of and" gate 59h is applied via delayline 61b to the input of predeter mined counter 58h advancing thiscounter one position. Because predetermined counter 58b had beeninitially set to respond to one input pulse, an output signal isfurnished to and gates 63h of Fig. la and 60 of Fig. lb. The outputsignal has no effect on and gate 63b of Fig. la because no pulse ispresent at the input connected to the output of Schmitt trigger 37.However, "and" gate 60 (of Fig. lb) becomes operative because of thepresence of the output signals of both predetermined counters 58a and58h of Fig. la. Predetermined counter 53a was initially set with thecount of one at the start of the sorting operation. Therefore, and gate60 (Fig. lb) furnishes an output signal to Schmitt trigger 69. Theoutput pulse of Schmitt trigger 69 is applied to the reset inputs ofboth predetermined counters 58a and 58b of Fig. la, resetting both thesecounters to their zero condition. The output pulse of Schmitt trigger 69of Fig. lb is also applied to the set input of ilip-ilop 62. The outputsignal of the flip-op 62 is applied to and" gates '74a and 7411,however, the output signal of the Hip-flop 62 does not pass either ofthe last mentioned and gates 74a or 74b because the initiation impulseis not present at this time.

The initiation pulse is also applied to delay line 43 of Fig. la, andafter being suitably delayed is applied as a reset impulse through orgates 57a and 57b to the reset inputs R of flip-hops 35a and 3511. Thus,both of the ip-ops 35a and 35b are reset whereby, neither of the andgates 59a and 59b is primed for operation. The reset impulse from delayline 43 is also applied to the reset inputs of character counter 36returning it to its zero condition and, in addition, the reset impulsefrom delay line 43 is applied to the reset input R of flip-Hop 32.

ln summary, during the preliminary operation, the eight characters ofthe serial number of the rst message of the A tape remain stored instorage register 46a Whose Hip-flops in turn respectively condition thesecond input grids of the corresponding and gates of output gates 48a.

Each of the predetermined counters 58a and S8b off Fig. la have beenunloaded by the reset impulse received from Schmitt trigger 69 of Fig.lb. Nevertheless, it should be pointed out that the predeterminedsetting of each of the predetermined counters remains at one count sothat each predetermined counter will furnish an output signal upon thereceipt of one input pulse.

Both the character counter 36 and Hip-tiop 32 of Fig. la have been resetto their zero condition.

Tape A has been stopped and tape B has been started by the output signalof and gate 59h.

Operation ofthe sorting apparati:

(Fig. i)

(B) SRTING PERATION (FIRST PASS) The first character of the firstmessage encoded on the B tape is the statt message symbol. This symbolis detected by first reading head 16h and passed through amplifiers 28hand pulse Shapers 38a to the inputs of code recognition gate 26. Theoutput signal of code recognition gate 26 is passed through delay line30 to the set inputs of flip-flop 32 which in turn primes and gate 34.

The highest order determining character of the first message encoded onthe B tape is next detected by reading head 16h, and passed throughpulse amplifiers 28h and pulse shapcrs 46h. The output signals of pulseshapers 40b are passed in parallel to the inputs of "or gate 42h andalso to the second input grids of input matrix 38b. The output signal of"or gate 42h is passed through or gate 47 to the other input of and"gate 34, which has already been primed by the start message symbol, tothe input of character counter 36, which, in tura furnishes an outputsignal at its first stage. The output signal of the character counter isapplied to the second input grids of the first column of and gates ofthe input matrix 38h. Coincidence of the signals from the pulse shapers40b and the output signal of character counter 36 at the iirst andsecond grids of the first column of the and gates of input matrix 38ocauses the gates of thc rst column of input matrix 38b to furnish outputsignals to the respective flip-ops oi the first column of storageregister 4Gb. The output signals of the rst column of Hip-flops ofstorage register 46h are connected respectively to the second inputgrids of output "and gates i311 priming these and gates for furtheroperation.

The output signal of the lirst stage of character counter 36 is alsoapplied in parallel to the inputs of delay lines 49a and 49b. After asuitable delay, the output signals of delay lines 49a and 49h areapplied to the first input grids of the first column of output and gates48a and 48b. Both first columns of output and gates 8a and 48b arepresently conditioned by their respective first column flip-flops ofstorage registers 46a and 461). Therefore, the outputs of both irstcolumns of output and gates 48a and 48b are applied to separate inputsof comparator 50. Since each of the iirst columns of output and" gates48a and 4Sb are representative of the binary value of the firstcharacter encoded on the A tape and the B tape respectively, thecomparator Si? now operates to determine which of the characters has thegreater' binary value.

Assume that the B message character is the greater, then the comparator5t) furnishes an output signal at its B A output 52a. The output signalon lead 52a is applied to an input of or gate 45 and also `to an inputof and" gate 53a. Because, both and gates 53u and 53b are primed by theoutput signal of flip-flop 55, the output signal on lead. 52a is passedthrough and gate 53a to an input of or gate 54u. The output signal of"or gate 45 is applied to the reset input of flip-flop 55. Thus, andgates 53a annd SSb are unresponsive to further output signals fromcomparator 50 until ip-flop S5 is again placed in its set position.

The output signal of -or" gate Sdn is applied `to the set input ofiiip-tlop 35a whose output signal then primes and gate 59a. The outputot` "or gate 54a also passes through or gate 57h to the reset input offlip-nop 35b. However, it does not affect flip-liep 3511 because thetlipflop is already in its reset condition as explained previously.

The output signal of ip-tiop 35a is applied to an input of and-not" gate51 priming this gate against further operation.

The remaining characters of the serial number of the first messageencoded on the B tape are passed one after the other through pulseamplifiers 231i, and pulse Shapers 40h, to the second input grids of theand gates of input matrix 38h. At the same time, the outputs of pulseShapers b are applied to the inputs of or gate 42h. The output signal ofor gate 42h is passed through or gate 47 and primed and gate 34 to theinput of character counter 36. The character counter 36 is advanced onecount for each of the remaining characters of the B message serialnumber. The output signal of each stage of the character counter 36 isapplied in turn to the first input grids of the second through eighthcolumn of the and gates of the input matrix 38b. The output 20 signalsof each column of and gates of the input matrix 38h in turn are appliedto the set inputs of the corresponding ip-iiops of storage register 46b.Thus, the eight characters of the serial number of the first messageencoded on input tape B are stored in the eight columns of storageregister 46b.

Upon receipt of the eighth impulse at its input, the character counter36 furnishes an output signal to Schmitt trigger 57. The output pulse ofSchmitt trigger 37 is apnlird to an input of both and gates 63a and 63hand the stt input of ip-op 55. However, "and" gates 63a and 63b are notresponsive to this signal since neither of the predetermined counters58a and 531') have primed the and gates 63a or 63h for operation.Fliptlop 55 thus primes and gates 53a and 5315 for operation.

The output pulse of Schmitt trigger 37 also passes through delay line39, and after being suitably delayed, is applied to an input of and-notgate 51 and delay line 41. However, and-not gate 51 has been conditionedagainst operation by the output signal from tiiptiop 35a. Delay line 41further delays the output of Schmitt trigger 37 and, in turn, the outputof delay line 41 is applied as an initiate signal to and gates 59a, and59h of Fig. ln and 74a and 7411 of Fig. lb.

And gate 59a of Fig. la is primed by tlip-op 35a and therefore furnishesan output to the start tape input of the tape A drive mechanism 56a andto the stop tape input of tape B drive mechanism 56b, causing input tapeA to start advancing and stopping the advance of input tape B. Theoutput signal of and gate 59a is also applied to thc reset inputs of thetiip-iiops of storage register 46a resetting these flip-hops to theirinitial or zero condition. In addition, the output signal of and" gate59a is applied through delay line 61a to the input of predeterminedcounter 58a. /xs predetermined counter 58a has been set to furnish anoutput signal in response to one input pulse, its output signal isapplied to one of the inputs of and gates 63a (of Fig. lu) and 60 (ofFig. 1b) priming both these gates for further operation.

The output pulse of Schmitt `trigger 37 is further delayed by delay line43 and applied as a reset impulse to the reset inputs of charactercounter 36, flip-flop 32 and, in addition, the reset output of delayline 43 is passed through or gates 57a and 57b to the reset inputs ofdip-hops 35a and 35b respectively.

Continued movement of the A message tape brings the charactersrepresenting the first input message beneath the second reading head18o. The seven channels 14a-g encoded on input tape A are read byreading head 18a and each character of the tirst message is detected inturn and applied in parallel to one input of each of the seven input orgates 66 (Fig. lb) which are connected to reading head isa.

During the preliminary operation, the output pulse of Schmitt trigger 69was applied at the input of Flip-flop 62. This input pulse operates toshift conduction from one of the stable states of Hip-liep 62 to theother. Assume that the left-hand tube as described above of flipliop 62is conducting. Therefore, and gate 74a to which the left-hand tube anodeis connected is held well below its cutoff bias. The initiation impulsegenerated by Schmitt trigger 37 is applied to both and gates 74a and74b. However, only "and gate 74h is primed to pass the initiate signal.The output signal of and gate 74b is applied to the reset input of ip-op73, which has the right-hand tube conducting as described above, therebyshifting conduction from the right-hand tube to the left-hand tube offlip-op 73. The output signal taken from the anode of the right-handtube of flip-op 73 is applied via lead 71b to the second input grids ofan gates 64b and hence and gates 64b are primed for operation. Theoutput signal taken from the anode of the left-hand tube of ip-op 73 isapplied via lead 71a to the second input grids of and gates 64a andhence and gates 64a are well below their cuto bias.

The output of and" gate 74b is applied to the start input of output tapeD drive mechanism 70b and to the stop input of output tape C drivemechanism 70a. Therefore, only tape D is started.

The seven output signals of or gate 66 are applied to the first inputgrids of and gates 64a and 64b. Because and gates 64b have been primed,the input signals from or gate 66 pass through and gates 64b torecording head 65h of output tape D.

In summary, during the sorting operation of the first pass, the firstmessage encoded on input tape A is determined to be the smaller bycomparator 50, storage register 46a is reset to its zero or initialcondition by the output signal from and" gate 59a. Character counter 36and p-fiop 32 as Well as flip-hops 35a `and 35b are reset to theirinitial condition. Flip-flop S is in its set condition thereby primingand" gates 53a and 53h. Predetermined counter 58a registers one countand primes and gates 63a (Fig. 1a) and 60 (Fig. 1b).

Input tape A now continues to advance and each of the characters of thefirst message is transferred one by one to output tape D. The lastcharacter of the first message encoded on input tape A is followed bythe start message symbol of the second message.

The start message symbol of the second message of input tape A isdetected by reading head 16a and causes and gate 34 to be primed as wasexplained in connection with the first message. The following eightcharacters of the serial number are also detected and stored in storageregister 46a as was the case with the first message. According to thelogic of the Strings of Two" method, the first message encoded on the Binput tape is required to be recorded on output tape D immediatelyfollowing the recording on output tape D of the rst message encoded onthe A tape. In order to so record the messages, the eighth character ofthe serial number of the second message encoded on input tape A causesthe last stage of the character counter 36 to furnish an output signalwhich is applied to the input of Schmitt trigger 37. The undelayedoutput pulse of Schmitt trigger 37 is applied to the second input gridof and gates 63a and 63b. But and gate 63a is primed to pass theundelayed output signal of Schmitt trigger 37 because of the primingvoltage previously applied by predetermined counter 58a to the first ofits inputs. The output signal of and" gate 63a is applied to and passesthrough or" gate 54b to the set input S of flip-hop 35b and through orgate 57a to the reset input R of ip-iiop 35a. Thus, ip-op 35b primes andgate 59b for further operation regardless of the results of thecomparison. The output signal of Schmitt trigger 37 is also applied tothe input of delay line 39. The signal from delay line 39 is applied toan input of and-not" gate 51, however, this input signal is ineffectiveto cause and-not gate 51 to furnish an output signal because it has beeninhibited due to the receipt of the output signal furnished by flip-flop35h. After being delayed by delay line 41, the output of Schmitt trigger37 is applied as an initiation impulse to and" gates 59a and 59b. Andgate S9b is responsive to the initiate signal due to its having beenconditioned by the output signal of fiip-op 35b. The output signal ofand" gate 59b is applied to the start input of B tape advance mechanism56b and to the stop input of A tape advance mechanism causing input tapeA to stop and input tape B to begin advancing. The output signal of and"gate 59b is applied to the reset inputs of storage register 46bresetting the tiip-tiops to their zero or initial condition. Inaddition, the output signal of and gate 59b is applied through delayline 61b to the input of predetermined counter 58b. Becausepredetermined counter 58b has been set to respond to one impulsereceived at its input, an output signal is now supplied to and gates 63bof Fig. la, and also to and gate 60 of Fig. lb. The impulse received by"and" gate 63b of Fig. 1a is ineffective to cause an output because oflack of coincidence with the undelayed signal from Schmitt trigger 37.However, and gate 60 of Fig. lb is conditioned by the output signal frompredetermined counter SSa of Fig. la, hence the output signal ofpredetermined counter 58h of Fig. la causes an gate 60 of Fig. lb tofurnish an output signal which is applied to Schmitt trigger 69 of Fig.lb. The output signal of Schmitt trigger 69 is applied to the resetinputs R of predetermined counters 58a and 58b of Fig. la, resettingthem to their initial or zero condition. The output pulse of Schmitttrigger 69 of Fig. 1b is also applied to the input of ip-op 62 of Fig.lb causing the conduction to shift from the left-hand tube, as describedabove, to the right-hand tube. The output signal taken from the anode ofthe left-hand tube of iiip-fiop 62 is applied to an input of and gate74a priming this and gate for further operation. The output voltage ofthe right-hand side of flip-hop 62 is applied to and gate 74b bringingthe bias of this latter and gate well below cutoff. However, liip-fiop73 remains in the state with its left hand tube conducting, as describedabove, because no output signal has passsed through and gate 74a and 74bdue to the lack of coincidence between the initiation impulse and theoutput signal of the left-hand tube of flip-hopI 62 which is applied toand gate 74a. Therefore, output tape D continues to advance and outputtape C remains stopped.

As input tape B has been started due to the receipt of a start impulse,the characters representative of the first input message encoded on tapeB are brought beneath second reading head 18h. The seven channels 14a-f(Fig. 5) are detected by reading head lSb and each character of thefirst input message is read out in turn to the first input grids of andgates 64a and 64b after passing through or" gates 66. The second inputgrids of and gate 64a remain biased below cutoff because flip-Hop 73remains in its previous operating state. Therefore, the output signalsof or gate 66 again pass through an gate 64b to recording head 65h ofoutput tape D.

Summarizing the sorting operation thus far, the first input messageencoded on the A tape is determined to be the lesser by comparator S0 ofFig. la. A signal is applied to the start input of tape A drivemechanism 56a by and" gate 59a. Also, the signal from and" gate 59aresets the storage register 46a and advances predetermined counter 58aone count. The first message encoded on the A tape is then transferredto output tape D. Next, the first eight characters of the second messageencoded on the A tape are stored in storage register 46a. Following thereceipt of the eighth character, a pulse is generated by Schmitt trigger37 and applied to an input of and gate 63a, which and gate is primed bypredetermined counter 58a. The output of the and gate 63a is applied tothe set input of hip-flop 35b which in turn conditions and gate 59b. Theinitiation impulse passes through and gate 59b to stop tape A and starttape B. The rst message encoded on tape B is then detected by readinghead 18b character by character and transferred through and gate 64b ofFig. lb to output tape D. Thus, the first message encoded on input tapeA is transferred to output tape D, and the first message encoded on tapeB is also transferred to output tape D following the first messagetransferred from tape A.

During the first pass, the operation continues in this fashion. Afterthe transfer of one message from each input tape to output tape D,output tape D is stopped, and output tape C is started due to the actionof flipop 73 of Fig. lb. Therefore, the messages encoded on the inputtapes A and B are transferred to the output tapes C and D in sequentialgroups of two.

On the second pass, the output tapes C and D become the input tapes A1and B1 respectively. Before sorting begins on the second pass, thestorage registers 46a and 46h of Fig. la are reset to their zero orinitial condition,

as mentioned heieinbefore, as by a manual switch. The predeterminedcounters 53a and 58h are set to furnish an output pulse upon the receiptof two impulses, that is, a count of two at their respective inputs.This count of two is required because on the second pass, according tothe strings of two method. two messages are transferred from each of theinput tapes to a single output tape. A preliminary sorting operation,similar to the one described, is carried out during the second pass,with the exception that a count of two is placed in predeterminedcounter SSa, for example, by a manual switch (not shown); and a count ofone is placed in a predetermined counter SSb also, for example, by amanual switch (not shown). This is necessary because the serial nurnberof the first message encoded on input tape A1 must be brought intostorage register 46a and the serial number of the first message encodedon input tape B1 must be brought into storage register 46h during thepreliminary operation of the second pass. Thus, tape Al is started andthe first serial number stored on input tape A1 is brought into StorageRegister 46a. Again, a start tape Bl signal is given due to thecomparator 50 furnishing an output signal at its A B terminal 52h. Thisoutput signal passes through and gate 53h and or gate 54h to the setinput of iiip-iiop 35h. The output of flip-flop 3Sb conditions and gate59h for operation. The initiate signal passes through and gate 59h tothe start tape B input of tape drive mechanism 566. predeterminedcounter 58b is also advanced one count due to the output of and gate5911 passing through delay line 6lb to the input of predeterminedcounter 58h, Input tape B1 advances until the tirst eight charactersofthe first message are counted by character counter 36. The undelayedoutput signal of Schmitt trigger 37 is passed through both and gates 63oand 64!) which are respectivciy primed by the outputs of bothpredetermined counters 58a and 5851. Coincidence of the output signalsof and gates 63a and 63h at the inputs of and gate 60 (Fig. 1b) causeand gate 60 to send a. reset impulse to predetermined counters 58a and58h (Fig. la) resetting both predetermined counters to a zero countcondition.

The sorting operation of the second pass continues just as in the rstpass with the exception that ip-op 73 is switched over after exactlyfour messages have been transh ferred from the input tapes, at whichtime the predetermined counters 58a and 58h furnish an output signalwhen two counts have been received by each predetermined counter 58a and58b.

ln general. the predetermined counter 58a is first set to respond to thenumber of messages required to be transferred from input tape A during aparticular pass; then, a count equal to the preset number is placedtherein. for example, by a manual switch (not shown), in order to primeand gate 63a and thereby cause and gate 60 (Fig. 1b) to furnish a resetsignal to both predetermined counters SSa and 58.5 (Fig. la) after thefirst eight characters of the first message encoded on input tape B areread into the storage register 4Gb. The predetermined counter 58h is setto respond to the number of messages required to be transferred fromtape B during the pass; then, a count one less than the present numberis placed therein, for example, by a manual switch (not shown), in orderthat an output signal is furnished to and gate 60 only after the serialnumber of the first message encoded on input tape B has been read intostorage register 45h. Both predetermined counters are then reset to azero count condition by the output signal from and" gate 60. Sorting isthen commenced and the input messages are rearranged on the output tapesin sequential groups.

SUMMARY A novel and useful apparatus for sorting by Strings of Two hasbeen described above. With this apparatus, messages which are encoded ona primary tape in any given arrangement may be sorted out and rearrangedin a predetermined sequence on an output tape. The apparatus disclosedabove automatically sorts the messages encoded on the input tapes oncethe predetermined counters have been set up to count the messagesrequired to be transferred from each input tape. The operation of theapparatus is the same for each pass, except that the number of messagesin a sequential group on an output tape vary.

The components described in connection with the apparatus areillustrative only, and any equivalent component may be used. Forexample, although the sensing means for reading the encoded messageshave been described as a reading head, any of the well-known transducingmeans used in tape transport mechanisms may be used to sense themessages encoded on the tapes so long as a suitable signal is furnishedto the amplifiers associated therewith.

What is claimed is:

l. An apparatus for sorting messages encoded on each of two input tapesinto a logical sequence on at least one output tape, comprising incombination, a different pair of transducing means adjacent the path ofeach of said input tapes, storage means coupled respectively to one ofeach pair of said transducing means, comparing means coupled to saidstorage means, transfer means responsive to said comparing means fortransferring said messages encoded on said input tapes to one of saidoutput tapes, and means coupled to said transfer means for maintainingthe messages in groups ordered internally in :1 logical sequence on saidoutput tape.

2. An apparatus for sorting messages encoded on a first input tape andsecond input tape into a desired se quence on at least one output tape,wherein each of the messages is preceded by an order determiningportion, comprising in combination, a pair of transducing means, eachadjacent the path of a diiierent one of said input tapes, a pair ofstorage means coupled to said transducing means for respectively storingthe order determining portions of a message encoded on said tirst inputtape and of a message encoded on said second input tape, comparing meanscoupled to said storage means for determining the relative order of saidstored portions, transfer means responsive to said comparing means fortransferring said messages encoded on said input tapes to one of saidoutput tapes, and means coupled to said transfer means for maintainingsaid messages in a sequential group on said output tape.

3. An apparatus for sorting messages encoded on each of two input tapesinto a predetermined logical sequence on at least one of a plurality ofoutput tapes, said messages being preceded by a plurality of charactersdenoting an order determining portion, comprising in combination, twopairs of transducing means each adjacent the path of a different one ofsaid input tapes, a pair of storage means coupled respectively to one ofeach pair of said two pairs of said transducing means for storing saidorder determining portions of a message encoded on said first input tapeand a message encoded on said second input tape, comparing means coupledto said pair of storage means for comparing said order determiningportions, distributing means coupled to said transducing means forswitching said stored order determining portions into said comparingmeans character by character, transfer means coupled to one of saidoutput tapes, and means coupled to said transfer means for maintainingthe messages in groups ordered within each group in accordance with thesaid order determining portions ot the mcssages on said output tapes.

4. A sorting apparatus as claimed in claim 3, wherein said switchingmeans includes a rst plurality of gates individually identifiable ascorresponding to the elements of an array arranged in rows and columns,a second plurality of gates individually identifiable as correspondingto the elements of an array arranged in rows and columns,

each of said columns being respectively coupled to said distributingmeans whereby said distributing means activates a corresponding columnYof each of said plurality of gates subsequent to the detection of acharacter of said order determining portion.

5. In an apparatus for sorting messages encoded on each of two inputtapes into a logical sequence on at least one output tape wherein onlythe order determining portion of a message is read from an external toan internal memory for comparison purposes, the combination cornprisinga first pair of transducing means rcspectvety nd- ]'acent the path ofsaid input tapes, a pair of storage means connected respectively to eachof said first transducing means, comparing means connected to both saidstorage means, a second pair of transducing means respectively adjacentthe path of each input tape and each spaced from the first transducingmeans adjacent the same said paths, transfer means connected to saidcomparing means for causing one of said messages at a time to be readout by said second transducing means to one of said output tapes, andmeans connected to said transfer means for maintaining the messages ingroups ordered within each group in accordance with the said orderdetermining portions of the messages on said output tapes` 6. In anapparatus for sorting messages encoded on a first and a second inputtape into one or more sequential groups on at least one output tape,each message being preceded by an order determining portion, thecombination comprising a rst input tape start and stop means, a secondinput tape start and stop means, and means including distributing meansresponsive to the occurrence of the last character of an orderdetermining portion for starting one of said input tapes and stoppingthe other of said input tapes.

7. In a sorting apparatus for sorting messages encoded on each of twoinput tapes into a predetermined sequence on at least one output tape,an electronic distributor responsive to an input signal, separatetransdueing means for each of said input tapes located adjacent the pathof each of said input tapes, each of said transducing means furnishingoutput signals, means to convert said plurality of output signals into asingle signal, and means to apply said single signal to the input ofsaid electronic distributor.

8. In a sorting apparatus for sorting messages encoded on each of twoinput tapes into a predetermined sequence on at least one output tape,the combination comprising an electronic distributor having an input anda plurality of outputs, a pair of storage means each having a pluralityof inputs and a plurality of outputs, two arrays of output gates, eacharray being connected respectively to the output side of one of saidpair of storage means, delay means connected between said distributoroutputs and said arrays of output gates, separate transducing means foreach of said input tapes and located adjacent the path thereof, meanscoupling each of said transducing means respectively to each of saidplurality of storage means inputs, an or gate, having a plurality ofinputs and a single output, means coupling said transducing means of theinputs of said or gate, and means coupling the output of said or gate tothe input of said electronic distributor.

9. in an apparatus for sorting messages encoded on a first input tapeand a second input tape into sequential groups on a first output tapeand a second output tape by a number of passes wherein the number ofmessages in a sequential group is a function of a given pass, thecornbination comprising a first and a second counting means operative torespectively count each message transferred from said first and saidsecond input tape, transfer means coupled to said first and said secondmeans and responsive thereto to automatically transfer at least onemessage from said second input tape when said first counting meansindicates that the number of messages required by a given pass have beentransferred from said first input tape.

10. In a sorting apparatus, the invention as recited irr claim 9 whereinsaid transfer means comprises a first eoincident circuit connected tosaid first counting means, a second coincident circuit connected to saidsecond counting means, a first switch having a first position and asecond position, a second switch having a first position and a secondposition, means coupling said first coincident circuit to the firstposition of said first switch and to the second position of said secondswitch, and means coupling said second coincident circuit to the secondposition of seid tiri: switch and to the first position of said secondswitch.

l1. In an apparatus for sorting messages encoded on a first input tapeand a second input tape into sequential groups on a first output tapeand a second output tape by a series of passes wherein the number ofmessages in a sequential group is a function of a given pass, thecombination comprising a first counting means operative to count thenumber of messages transferred from said first input tape and responsivethereto to furnish an output signal after a predetermined number ofmessages have been counted, a second counting means operative to countthe number of messages transferred from said second input tape andresponsive thereto to furnish an output signal after a predeterminednumber of messages have been transferred, coincident means coupled tosaid first and said second counting means, switching means coupled tosaid coincident means and responsive thereto, means coupled to saidswitching means to start one of said output tapes and to stop the otherof said output tapes.

l2. In an apparatus the invention as recited in claim ll wherein thenumber of messages in a sequential group is equal to 2V1 where (y) isthe number of a given pass,

13. In an apparatus for sorting messages encoded on a first input tapeand a second input tape wherein sorting is commenced by reading in theorder determining characters of the first message encoded on said firstinput tape, transducing means adjacent the path of said first inputtape, and means operatively connected to said transducing means andresponsive to signals corresponding to the last order determiningcharacter of said first message of said first input tape to stop saidrst input tape and start said second input tape.

14. In an apparatus for sorting messages encoded on a first input tapeand a second input tape, each of said messages having a plurality ofcharacters denoting a serial number, the combination comprising meansfor comparing the serial number of a message encoded on said first inputtape with the serial number of a message encoded on said second inputtape in a comparing means, means operatively connected with andresponsive to said comparing means and responsive to signals from saidcomparing means to advance one of said input tapes in accordance with anequality indication from said comparing means.

l5. In an apparatus for sorting messages a first portion of which areencoded on a first input tape and a second portion of which are encodedon a second input tape each of said messages having a fixed plurality oforder determining characters denoting a serial number, wherein saidmessages are transferred to and arranged upon at least one output tapein sequential groups, each said sequential group having a predeterminednumber of messages transferred from said first input tape and apredetermined number of messages transferred from said second inputtape, and said sequential order is determined by the comparison of theserial number of a message encoded on said first input tape with theserial number of a message encoded on said second input tape, thecombination cornprising first counting means associated with said firstinput tape, second counting means associated with said second inputtape, a first switch means having a first position and a secondposition, a second switch means having a first position and a secondposition, means coupling said first counting means to the secondposition of said first switch

